1. Field of the Invention
The present invention relates to apparatus and methods for converting and displaying pixel types in a frame buffer prior to display. More particularly, the present invention relates to an improved address space aliasing method and apparatus to identify and convert pixel types supplied by a central processing unit (CPU) to a display system.
2. Art Background
A common and natural means of communicating with a computer is with graphic representations of data displayed on a display. Humans interact readily in terms of images, and a person is able to absorb or manipulate information presented in a visual context much faster than if it is represented simply by text. Over the past three decades, a variety of computer graphic systems have been developed to display objects, text and other alpha numeric information on cathode ray tube (CRT) or liquid crystal (LCD) display screens.
Many computer graphic systems employed today utilize an image storage system, such as a bit map frame buffer, and an image display system, such as a CRT. A central processing unit (CPU), or other graphics engine, provides pixel data to the bit map frame buffer. The pixel data comprises a series of values to be written into various known addresses of the frame buffer, where a collection of these values describes an image to be displayed on the CRT or LCD. Typically, pixel values stored in the frame buffer are sequentially read and converted through a digital to analog (D/A) converter, which is coupled to the analog CRT. For digital displays such as LCD, no D/A is required. Some computer display systems employ "double buffering" wherein two frame buffer display memories are alternately read between one another, such that while the computer display system writes data corresponding to an image in the currently non-displayed frame buffer memory, the image data in the other frame buffer memory is displayed. Once the rendering of the image in the non-displayed buffer memory is complete, the display system selects the previously non-displayed buffer and displays its image while the other frame buffer memory image data is updated. For additional description of computer graphics architectures and pixel data streams, see for example; Akeley, Jermoluk, "High Performance Polygon Rendering", Computer Graphics, Vol. 22, No. 4 (August 1988); Shires, "A New VLSI Graphics Coprocessor--The Intel 82786"IEEE Computer Graphics and Applications, Vol. 6, No. 10 (October 1986).
In modern computer display systems which employ, for example, multiple processors, a variety of standard pixel types may be supplied by the CPU or graphics engine to a graphics controller coupled to a frame buffer. However, unless the configuration of particular frame buffer matches the pixel type of graphic data supplied, the graphics controller must convert every pixel to the "type" of pixel data which may be accepted by the frame buffer memory. As will be described, the present invention provides methods and apparatus for address space aliasing to identify pixel types for each point of the pixel data to be written into the frame buffer. The graphics controller, reading a tag identifying the pixel type of the pixel data, converts the pixel data to the particular pixel type of data acceptable by the frame buffer, such that all pixel data written into the frame buffer is of the same type. Some common types of pixel data include RGB 16, RGB 32, YUV 16, and COLORINDEX 8bpp, among others.